PCSX2 Documentation/Virtual Memory: Difference between revisions
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The Playstation 2 uses co-processor 0 to implement virtual paging. Even without COP0, the Playstation 2 memory map is pretty complex and the mapping can change depending on which processor you use to read the memory from. A simple version of how the default mapping looks from the Emotion Engine side is: | The Playstation 2 uses co-processor 0 to implement virtual paging. Even without COP0, the Playstation 2 memory map is pretty complex and the mapping can change depending on which processor you use to read the memory from. A simple version of how the default mapping looks from the Emotion Engine side is: | ||
*The 32Mb of main memory occupying 0000_0000 - 01ff_ffff | |||
The 32Mb of main memory occupying 0000_0000 - 01ff_ffff | *Hardware registers occupying 1000_0000 - 1000_ffff | ||
Hardware registers occupying 1000_0000 - 1000_ffff | *VU/BIOS/SPU2 addresses in 1100_0000-1fff_ffff | ||
VU/BIOS/SPU2 addresses in 1100_0000-1fff_ffff | *Special kernel modes etc in 8000_0000-bfff_ffff | ||
Special kernel modes etc in 8000_0000-bfff_ffff | *A scratch pad in some other address | ||
A scratch pad in some other address | *...And of course can't forget the hidden addresses (thanks SONY) | ||
...And of course can't forget the hidden addresses (thanks SONY) | |||
To make matters worse, these mappings can change depending on the setting of COP0. (Note that at the time of writing, Pcsx2 doesn't emulate even half of COP0 correctly.) The simplest and most straightforward way to emulate this is to have another memory layer through a software Translation-Lookaside-Buffer (TLB). You pass it the PS2 address, and out comes the real physical address or some special code signifying a hardware register, etc. The problem is that every read/write has to be preceded by a TLB lookup. Considering that reads/writes are as common as addition, that's a lot of wasted cycles. | To make matters worse, these mappings can change depending on the setting of COP0. (Note that at the time of writing, Pcsx2 doesn't emulate even half of COP0 correctly.) The simplest and most straightforward way to emulate this is to have another memory layer through a software Translation-Lookaside-Buffer (TLB). You pass it the PS2 address, and out comes the real physical address or some special code signifying a hardware register, etc. The problem is that every read/write has to be preceded by a TLB lookup. Considering that reads/writes are as common as addition, that's a lot of wasted cycles. | ||
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Read an OS book. I recommend Operating System Concepts (the dinosaur book) by Abraham Silberschatz, Peter Baer Galvin, Greg Gagne. | Read an OS book. I recommend Operating System Concepts (the dinosaur book) by Abraham Silberschatz, Peter Baer Galvin, Greg Gagne. | ||
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