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Example
 
Example
   −
Code:
+
<source lang="asm">
 
IAND:
 
IAND:
 
1000000 | 0000 | it x 5 | is x 5 | id x 5 | 110100
 
1000000 | 0000 | it x 5 | is x 5 | id x 5 | 110100
 +
</source>
    
If for 'id' we have '18', then the destination would be
 
If for 'id' we have '18', then the destination would be
   −
Code:
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<source lang="asm">
 
18 &= 0xf;
 
18 &= 0xf;
 +
</source>
 +
 
Resulting in the destination reg being vi02.
 
Resulting in the destination reg being vi02.
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Example:
 
Example:
   −
Code:
+
<source lang="asm">
 
IADDIU vi05, vi00, 100
 
IADDIU vi05, vi00, 100
 
IBNE vi05, vi00 &lt;---- vi05's value is before the 100 was added
 
IBNE vi05, vi00 &lt;---- vi05's value is before the 100 was added
 +
</source>
    
The only exception to this are Flag reading lower instructions (FSxxx/FMxxx/FCxxx). In those cases the current value is read.
 
The only exception to this are Flag reading lower instructions (FSxxx/FMxxx/FCxxx). In those cases the current value is read.
   −
Code:
+
<source lang="asm">
 
FSAND vi05, 0xfff
 
FSAND vi05, 0xfff
 
IBNE vi05, vi00 &lt;---- vi05's value is the Status Reg
 
IBNE vi05, vi00 &lt;---- vi05's value is the Status Reg
 +
</source>
    
The situation becomes complex however when a VI reg is read AND written to in a sequence of instructions.
 
The situation becomes complex however when a VI reg is read AND written to in a sequence of instructions.
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